arch/alpha/include/asm/core_polaris.h
Source file repositories/reference/linux-study-clean/arch/alpha/include/asm/core_polaris.h
File Facts
- System
- Linux kernel
- Corpus path
arch/alpha/include/asm/core_polaris.h- Extension
.h- Size
- 2987 bytes
- Lines
- 112
- Domain
- Architecture Layer
- Bucket
- arch/alpha
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hasm/compiler.hasm/io_trivial.h
Detected Declarations
struct el_POLARIS_sysdata_mcheckfunction polaris_is_ioaddrfunction polaris_is_mmio
Annotated Snippet
struct el_POLARIS_sysdata_mcheck {
u_long psc_status;
u_long psc_pcictl0;
u_long psc_pcictl1;
u_long psc_pcictl2;
};
#ifdef __KERNEL__
#ifndef __EXTERN_INLINE
#define __EXTERN_INLINE extern inline
#define __IO_EXTERN_INLINE
#endif
/*
* I/O functions:
*
* POLARIS, the PCI/memory support chipset for the PCA56 (21164PC)
* processors, can use either a sparse address mapping scheme, or the
* so-called byte-word PCI address space, to get at PCI memory and I/O.
*
* However, we will support only the BWX form.
*/
/*
* Memory functions. Polaris allows all accesses (byte/word
* as well as long/quad) to be done through dense space.
*
* We will only support DENSE access via BWX insns.
*/
__EXTERN_INLINE void __iomem *polaris_ioportmap(unsigned long addr)
{
return (void __iomem *)(addr + POLARIS_DENSE_IO_BASE);
}
__EXTERN_INLINE void __iomem *polaris_ioremap(unsigned long addr,
unsigned long size)
{
return (void __iomem *)(addr + POLARIS_DENSE_MEM_BASE);
}
__EXTERN_INLINE int polaris_is_ioaddr(unsigned long addr)
{
return addr >= POLARIS_SPARSE_MEM_BASE;
}
__EXTERN_INLINE int polaris_is_mmio(const volatile void __iomem *addr)
{
return (unsigned long)addr < POLARIS_SPARSE_IO_BASE;
}
#undef __IO_PREFIX
#define __IO_PREFIX polaris
#define polaris_trivial_rw_bw 1
#define polaris_trivial_rw_lq 1
#define polaris_trivial_io_bw 1
#define polaris_trivial_io_lq 1
#define polaris_trivial_iounmap 1
#include <asm/io_trivial.h>
#ifdef __IO_EXTERN_INLINE
#undef __EXTERN_INLINE
#undef __IO_EXTERN_INLINE
#endif
#endif /* __KERNEL__ */
#endif /* __ALPHA_POLARIS__H__ */
Annotation
- Immediate include surface: `linux/types.h`, `asm/compiler.h`, `asm/io_trivial.h`.
- Detected declarations: `struct el_POLARIS_sysdata_mcheck`, `function polaris_is_ioaddr`, `function polaris_is_mmio`.
- Atlas domain: Architecture Layer / arch/alpha.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.