arch/alpha/kernel/pci_iommu.c
Source file repositories/reference/linux-study-clean/arch/alpha/kernel/pci_iommu.c
File Facts
- System
- Linux kernel
- Corpus path
arch/alpha/kernel/pci_iommu.c- Extension
.c- Size
- 24965 bytes
- Lines
- 925
- Domain
- Architecture Layer
- Bucket
- arch/alpha
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/mm.hlinux/pci.hlinux/gfp.hlinux/memblock.hlinux/export.hlinux/scatterlist.hlinux/log2.hlinux/dma-map-ops.hlinux/iommu-helper.hlinux/string_choices.hasm/io.hasm/hwrpb.hproto.hpci_impl.h
Detected Declarations
function mk_iommu_ptefunction size_for_memoryfunction iommu_arena_new_nodefunction iommu_arena_newfunction iommu_arena_find_pagesfunction iommu_arena_allocfunction iommu_arena_freefunction pci_dac_dma_supportedfunction pci_map_single_1function alpha_pci_map_physfunction alpha_pci_unmap_physfunction alpha_pci_free_coherentfunction sg_classifyfunction sg_fillfunction alpha_pci_map_sgfunction pci_unmap_singlefunction alpha_pci_supportedfunction iommu_reservefunction iommu_releasefunction iommu_bindfunction iommu_unbindexport alpha_pci_ops
Annotated Snippet
if (!i && iommu_is_span_boundary(p, n, base, boundary_size)) {
p = ALIGN(p + 1, mask + 1);
goto again;
}
if (ptes[p+i]) {
p = ALIGN(p + i + 1, mask + 1);
i = 0;
} else {
i = i + 1;
}
}
if (i < n) {
if (pass < 1) {
/*
* Reached the end. Flush the TLB and restart
* the search from the beginning.
*/
alpha_mv.mv_pci_tbi(arena->hose, 0, -1);
pass++;
p = 0;
i = 0;
goto again;
} else
return -1;
}
/* Success. It's the responsibility of the caller to mark them
in use before releasing the lock */
return p;
}
static long
iommu_arena_alloc(struct device *dev, struct pci_iommu_arena *arena, long n,
unsigned int align)
{
unsigned long flags;
unsigned long *ptes;
long i, p, mask;
spin_lock_irqsave(&arena->lock, flags);
/* Search for N empty ptes */
ptes = arena->ptes;
mask = max(align, arena->align_entry) - 1;
p = iommu_arena_find_pages(dev, arena, n, mask);
if (p < 0) {
spin_unlock_irqrestore(&arena->lock, flags);
return -1;
}
/* Success. Mark them all in use, ie not zero and invalid
for the iommu tlb that could load them from under us.
The chip specific bits will fill this in with something
kosher when we return. */
for (i = 0; i < n; ++i)
ptes[p+i] = IOMMU_INVALID_PTE;
arena->next_entry = p + n;
spin_unlock_irqrestore(&arena->lock, flags);
return p;
}
static void
iommu_arena_free(struct pci_iommu_arena *arena, long ofs, long n)
{
unsigned long *p;
long i;
p = arena->ptes + ofs;
for (i = 0; i < n; ++i)
p[i] = 0;
}
/*
* True if the machine supports DAC addressing, and DEV can
* make use of it given MASK.
*/
static int pci_dac_dma_supported(struct pci_dev *dev, u64 mask)
{
dma_addr_t dac_offset = alpha_mv.pci_dac_offset;
int ok = 1;
/* If this is not set, the machine doesn't support DAC at all. */
if (dac_offset == 0)
ok = 0;
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/mm.h`, `linux/pci.h`, `linux/gfp.h`, `linux/memblock.h`, `linux/export.h`, `linux/scatterlist.h`, `linux/log2.h`.
- Detected declarations: `function mk_iommu_pte`, `function size_for_memory`, `function iommu_arena_new_node`, `function iommu_arena_new`, `function iommu_arena_find_pages`, `function iommu_arena_alloc`, `function iommu_arena_free`, `function pci_dac_dma_supported`, `function pci_map_single_1`, `function alpha_pci_map_phys`.
- Atlas domain: Architecture Layer / arch/alpha.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.