arch/arc/include/uapi/asm/cachectl.h

File Facts

System

Linux kernel

Corpus path

arch/arc/include/uapi/asm/cachectl.h

Extension

.h

Size

768 bytes

Lines

30

Domain

Architecture Layer

Bucket

arch/arc

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __ARC_ASM_CACHECTL_H
#define __ARC_ASM_CACHECTL_H

/*
 * ARC ABI flags defined for Android's finegrained cacheflush requirements
 */
#define CF_I_INV	0x0002
#define CF_D_FLUSH	0x0010
#define CF_D_FLUSH_INV	0x0020

#define CF_DEFAULT	(CF_I_INV | CF_D_FLUSH)

/*
 * Standard flags expected by cacheflush system call users
 */
#define ICACHE	CF_I_INV
#define DCACHE	CF_D_FLUSH
#define BCACHE	(CF_I_INV | CF_D_FLUSH)

#endif

Annotation

• Atlas domain: Architecture Layer / arch/arc.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.