arch/arm/boot/dts/allwinner/sun6i-a31.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/allwinner/sun6i-a31.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/allwinner/sun6i-a31.dtsi
Extension
.dtsi
Size
35838 bytes
Lines
1423
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>

#include <dt-bindings/clock/sun6i-a31-ccu.h>
#include <dt-bindings/clock/sun6i-rtc.h>
#include <dt-bindings/reset/sun6i-a31-ccu.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &gmac;
	};

	chosen {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		simplefb_hdmi: framebuffer-lcd0-hdmi {
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0-hdmi";
			clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
				 <&ccu CLK_AHB1_HDMI>, <&ccu CLK_DRAM_BE0>,
				 <&ccu CLK_IEP_DRC0>, <&ccu CLK_BE0>,
				 <&ccu CLK_LCD0_CH1>, <&ccu CLK_HDMI>;
			status = "disabled";
		};

		simplefb_lcd: framebuffer-lcd0 {
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0";
			clocks = <&ccu CLK_AHB1_BE0>, <&ccu CLK_AHB1_LCD0>,
				 <&ccu CLK_DRAM_BE0>, <&ccu CLK_IEP_DRC0>,
				 <&ccu CLK_BE0>, <&ccu CLK_LCD0_CH0>;
			status = "disabled";
		};
	};

	timer {
		compatible = "arm,armv7-timer";
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
		clock-frequency = <24000000>;
		arm,cpu-registers-not-fw-configured;
	};

	cpus {
		enable-method = "allwinner,sun6i-a31";
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0>;
			clocks = <&ccu CLK_CPU>;
			clock-latency = <244144>; /* 8 32k periods */
			operating-points =
				/* kHz	  uV */
				<1008000 1200000>,
				<864000 1200000>,
				<720000 1100000>,
				<480000 1000000>;

Annotation

Implementation Notes