arch/arm/boot/dts/allwinner/sun7i-a20.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/allwinner/sun7i-a20.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/allwinner/sun7i-a20.dtsi
Extension
.dtsi
Size
41946 bytes
Lines
1711
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/dma/sun4i-a10.h>
#include <dt-bindings/clock/sun7i-a20-ccu.h>
#include <dt-bindings/reset/sun4i-a10-ccu.h>
#include <dt-bindings/pinctrl/sun4i-a10.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		ethernet0 = &gmac;
	};

	chosen {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		framebuffer-lcd0-hdmi {
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0-hdmi";
			clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_HDMI0>,
				 <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
				 <&ccu CLK_TCON0_CH1>, <&ccu CLK_DRAM_DE_BE0>,
				 <&ccu CLK_HDMI>;
			status = "disabled";
		};

		framebuffer-lcd0 {
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0";
			clocks = <&ccu CLK_AHB_LCD0>, <&ccu CLK_AHB_DE_BE0>,
				 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH0>,
				 <&ccu CLK_DRAM_DE_BE0>;
			status = "disabled";
		};

		framebuffer-lcd0-tve0 {
			compatible = "allwinner,simple-framebuffer",
				     "simple-framebuffer";
			allwinner,pipeline = "de_be0-lcd0-tve0";
			clocks = <&ccu CLK_AHB_TVE0>, <&ccu CLK_AHB_LCD0>,
				 <&ccu CLK_AHB_DE_BE0>,
				 <&ccu CLK_DE_BE0>, <&ccu CLK_TCON0_CH1>,
				 <&ccu CLK_DRAM_TVE0>, <&ccu CLK_DRAM_DE_BE0>;
			status = "disabled";
		};
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			reg = <0>;
			clocks = <&ccu CLK_CPU>;
			clock-latency = <244144>; /* 8 32k periods */
			operating-points =
				/* kHz	  uV */
				<960000	1400000>,
				<912000	1400000>,
				<864000	1300000>,
				<720000	1200000>,

Annotation

Implementation Notes