arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/allwinner/sun8i-a83t.dtsi
Extension
.dtsi
Size
32945 bytes
Lines
1318
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/clock/sun8i-a83t-ccu.h>
#include <dt-bindings/clock/sun8i-de2.h>
#include <dt-bindings/clock/sun8i-r-ccu.h>
#include <dt-bindings/reset/sun8i-a83t-ccu.h>
#include <dt-bindings/reset/sun8i-de2.h>
#include <dt-bindings/reset/sun8i-r-ccu.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			clocks = <&ccu CLK_C0CPUX>;
			operating-points-v2 = <&cpu0_opp_table>;
			cci-control-port = <&cci_control0>;
			enable-method = "allwinner,sun8i-a83t-smp";
			reg = <0>;
			#cooling-cells = <2>;
		};

		cpu1: cpu@1 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			clocks = <&ccu CLK_C0CPUX>;
			operating-points-v2 = <&cpu0_opp_table>;
			cci-control-port = <&cci_control0>;
			enable-method = "allwinner,sun8i-a83t-smp";
			reg = <1>;
			#cooling-cells = <2>;
		};

		cpu2: cpu@2 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			clocks = <&ccu CLK_C0CPUX>;
			operating-points-v2 = <&cpu0_opp_table>;
			cci-control-port = <&cci_control0>;
			enable-method = "allwinner,sun8i-a83t-smp";
			reg = <2>;
			#cooling-cells = <2>;
		};

		cpu3: cpu@3 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			clocks = <&ccu CLK_C0CPUX>;
			operating-points-v2 = <&cpu0_opp_table>;
			cci-control-port = <&cci_control0>;
			enable-method = "allwinner,sun8i-a83t-smp";
			reg = <3>;
			#cooling-cells = <2>;
		};

		cpu100: cpu@100 {
			compatible = "arm,cortex-a7";
			device_type = "cpu";
			clocks = <&ccu CLK_C1CPUX>;
			operating-points-v2 = <&cpu1_opp_table>;
			cci-control-port = <&cci_control1>;
			enable-method = "allwinner,sun8i-a83t-smp";

Annotation

Implementation Notes