arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/allwinner/sun8i-h3-nanopi-neo-air.dts- Extension
.dts- Size
- 3995 bytes
- Lines
- 144
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
sun8i-h3.dtsisunxi-common-regulators.dtsidt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
/dts-v1/;
#include "sun8i-h3.dtsi"
#include "sunxi-common-regulators.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "FriendlyARM NanoPi NEO Air";
compatible = "friendlyarm,nanopi-neo-air", "allwinner,sun8i-h3";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
led-0 {
label = "nanopi:green:pwr";
gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
default-state = "on";
};
led-1 {
label = "nanopi:blue:status";
gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
};
};
wifi_pwrseq: pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
};
};
&mmc0 {
vmmc-supply = <®_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
status = "okay";
};
&mmc1 {
vmmc-supply = <®_vcc3v3>;
vqmmc-supply = <®_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
brcmf: wifi@1 {
reg = <1>;
compatible = "brcm,bcm4329-fmac";
interrupt-parent = <&pio>;
interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
interrupt-names = "host-wake";
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_8bit_pins>;
vmmc-supply = <®_vcc3v3>;
vqmmc-supply = <®_vcc3v3>;
bus-width = <8>;
non-removable;
Annotation
- Immediate include surface: `sun8i-h3.dtsi`, `sunxi-common-regulators.dtsi`, `dt-bindings/gpio/gpio.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.