arch/arm/boot/dts/arm/arm-realview-eb-bbrevd.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/arm/arm-realview-eb-bbrevd.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/arm/arm-realview-eb-bbrevd.dtsi- Extension
.dtsi- Size
- 1701 bytes
- Lines
- 46
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
/ {
/* Introduce a fixed regulator for the new ethernet controller */
veth: regulator-veth {
compatible = "regulator-fixed";
regulator-name = "veth";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
};
/*
* The revision D has a different ethernet controller that the elder boards:
* the older board uses LAN91C111 but the new one uses LAN9118.
*/
ðernet {
compatible = "smsc,lan9118", "smsc,lan9115";
phy-mode = "mii";
smsc,irq-active-high;
smsc,irq-push-pull;
vdd33a-supply = <&veth>;
vddvario-supply = <&veth>;
};
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.