arch/arm/boot/dts/arm/arm-realview-eb.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/arm/arm-realview-eb.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/arm/arm-realview-eb.dts- Extension
.dts- Size
- 3886 bytes
- Lines
- 167
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/interrupt-controller/irq.hdt-bindings/gpio/gpio.harm-realview-eb.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "arm-realview-eb.dtsi"
/ {
model = "ARM RealView Emulation Baseboard";
compatible = "arm,realview-eb";
arm,hbi = <0x140>;
/*
* This is the core tile with the CPU and GIC etc for the
* ARM926EJ-S, ARM1136, ARM1176 that does not have L2 cache
* or PMU.
*
* To run this machine with QEMU, specify the following:
* qemu-system-arm -M realview-eb
* Unless specified, QEMU will emulate an ARM926EJ-S core tile.
* Switches -cpu arm1136 or -cpu arm1176 emulates the other
* core tiles.
*/
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "arm,realview-eb-soc", "simple-bus";
regmap = <&syscon>;
ranges;
intc: interrupt-controller@10040000 {
compatible = "arm,pl390";
#interrupt-cells = <3>;
#address-cells = <1>;
interrupt-controller;
reg = <0x10041000 0x1000>,
<0x10040000 0x100>;
};
};
};
/*
* This adapts all the peripherals to the interrupt routing
* to the GIC on the core tile.
*/
ðernet {
interrupt-parent = <&intc>;
interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
};
&usb {
interrupt-parent = <&intc>;
interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
};
&aaci {
interrupt-parent = <&intc>;
interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>;
};
&mmc {
interrupt-parent = <&intc>;
interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
<0 18 IRQ_TYPE_LEVEL_HIGH>;
};
&kmi0 {
interrupt-parent = <&intc>;
interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>;
};
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/gpio/gpio.h`, `arm-realview-eb.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.