arch/arm/boot/dts/arm/integratorcp.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/arm/integratorcp.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/arm/integratorcp.dts- Extension
.dts- Size
- 7367 bytes
- Lines
- 323
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree for the ARM Integrator/CP platform
*/
/dts-v1/;
/include/ "integrator.dtsi"
/ {
model = "ARM Integrator/CP";
compatible = "arm,integrator-cp";
chosen {
bootargs = "root=/dev/ram0 console=ttyAMA0,38400n8 earlyprintk";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
/*
* Since the board has pluggable CPU modules, we
* cannot define a proper compatible here. Let the
* boot loader fill in the apropriate compatible
* string if necessary.
*/
/* compatible = "arm,arm920t"; */
reg = <0>;
/*
* TBD comment.
*/
/* kHz uV */
operating-points = <50000 0
48000 0>;
clocks = <&cmcore>;
clock-names = "cpu";
clock-latency = <1000000>; /* 1 ms */
};
};
/*
* The Integrator/CP overall clocking architecture can be found in
* ARM DUI 0184B page 7-28 "Integrator/CP922T system clocks" which
* appear to illustrate the layout used in most configurations.
*/
/* The codec chrystal operates at 24.576 MHz */
xtal_codec: clock-24576000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24576000>;
};
/* The chrystal is divided by 2 by the codec for the AACI bit clock */
aaci_bitclk: clock-12288000 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clock-div = <2>;
clock-mult = <1>;
clocks = <&xtal_codec>;
};
/* This is a 25MHz chrystal on the base board */
xtal25mhz: clock-25000000 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
};
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.