arch/arm/boot/dts/arm/vexpress-v2m.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/arm/vexpress-v2m.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/arm/vexpress-v2m.dtsi
Extension
.dtsi
Size
13843 bytes
Lines
510
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * ARM Ltd. Versatile Express
 *
 * Motherboard Express uATX
 * V2M-P1
 *
 * HBI-0190D
 *
 * Original memory map ("Legacy memory map" in the board's
 * Technical Reference Manual)
 *
 * WARNING! The hardware described in this file is independent from the
 * RS1 variant (vexpress-v2m-rs1.dtsi), but there is a strong
 * correspondence between the two configurations.
 *
 * TAKE CARE WHEN MAINTAINING THIS FILE TO PROPAGATE ANY RELEVANT
 * CHANGES TO vexpress-v2m-rs1.dtsi!
 */
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	bus@40000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		ranges = <0x40000000 0x40000000 0x10000000>,
			 <0x10000000 0x10000000 0x00020000>;

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 63>;
		interrupt-map = <0  0 &gic GIC_SPI  0 IRQ_TYPE_LEVEL_HIGH>,
				<0  1 &gic GIC_SPI  1 IRQ_TYPE_LEVEL_HIGH>,
				<0  2 &gic GIC_SPI  2 IRQ_TYPE_LEVEL_HIGH>,
				<0  3 &gic GIC_SPI  3 IRQ_TYPE_LEVEL_HIGH>,
				<0  4 &gic GIC_SPI  4 IRQ_TYPE_LEVEL_HIGH>,
				<0  5 &gic GIC_SPI  5 IRQ_TYPE_LEVEL_HIGH>,
				<0  6 &gic GIC_SPI  6 IRQ_TYPE_LEVEL_HIGH>,
				<0  7 &gic GIC_SPI  7 IRQ_TYPE_LEVEL_HIGH>,
				<0  8 &gic GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>,
				<0  9 &gic GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>,
				<0 10 &gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
				<0 11 &gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
				<0 12 &gic GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
				<0 13 &gic GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
				<0 14 &gic GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
				<0 15 &gic GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
				<0 16 &gic GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
				<0 17 &gic GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
				<0 18 &gic GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
				<0 19 &gic GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
				<0 20 &gic GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
				<0 21 &gic GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
				<0 22 &gic GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
				<0 23 &gic GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>,
				<0 24 &gic GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>,
				<0 25 &gic GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>,
				<0 26 &gic GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>,
				<0 27 &gic GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>,
				<0 28 &gic GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>,
				<0 29 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>,
				<0 30 &gic GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
				<0 31 &gic GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>,
				<0 32 &gic GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
				<0 33 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
				<0 34 &gic GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
				<0 35 &gic GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
				<0 36 &gic GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
				<0 37 &gic GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
				<0 38 &gic GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,

Annotation

Implementation Notes