arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/aspeed/aspeed-bmc-ampere-mtmitchell.dts- Extension
.dts- Size
- 21058 bytes
- Lines
- 1062
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
aspeed-g6.dtsidt-bindings/i2c/i2c.hdt-bindings/gpio/aspeed-gpio.hopenbmc-flash-layout-64.dtsiopenbmc-flash-layout-64-alt.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (c) 2022, Ampere Computing LLC
/dts-v1/;
#include "aspeed-g6.dtsi"
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Ampere Mt.Mitchell BMC";
compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
aliases {
serial7 = &uart8;
serial8 = &uart9;
/*
* I2C temperature alias port
*/
i2c20 = &i2c4_bus70_chn0;
i2c21 = &i2c4_bus70_chn1;
i2c22 = &i2c4_bus70_chn2;
i2c23 = &i2c4_bus70_chn3;
/*
* i2c bus 30-31 assigned to OCP slot 0-1
*/
i2c30 = &ocpslot_0;
i2c31 = &ocpslot_1;
/*
* i2c bus 32-33 assigned to Riser slot 0-1
*/
i2c32 = &i2c_riser0;
i2c33 = &i2c_riser1;
/*
* i2c bus 38-39 assigned to FRU on Riser slot 0-1
*/
i2c38 = &i2c_riser0_chn_0;
i2c39 = &i2c_riser1_chn_0;
/*
* I2C NVMe alias port
*/
i2c100 = &backplane_0;
i2c48 = &nvmeslot_0;
i2c49 = &nvmeslot_1;
i2c50 = &nvmeslot_2;
i2c51 = &nvmeslot_3;
i2c52 = &nvmeslot_4;
i2c53 = &nvmeslot_5;
i2c54 = &nvmeslot_6;
i2c55 = &nvmeslot_7;
i2c101 = &backplane_1;
i2c56 = &nvmeslot_8;
i2c57 = &nvmeslot_9;
i2c58 = &nvmeslot_10;
i2c59 = &nvmeslot_11;
i2c60 = &nvmeslot_12;
i2c61 = &nvmeslot_13;
i2c62 = &nvmeslot_14;
i2c63 = &nvmeslot_15;
i2c102 = &backplane_2;
i2c64 = &nvmeslot_16;
i2c65 = &nvmeslot_17;
i2c66 = &nvmeslot_18;
Annotation
- Immediate include surface: `aspeed-g6.dtsi`, `dt-bindings/i2c/i2c.h`, `dt-bindings/gpio/aspeed-gpio.h`, `openbmc-flash-layout-64.dtsi`, `openbmc-flash-layout-64-alt.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.