arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/aspeed/aspeed-bmc-ibm-blueridge.dts- Extension
.dts- Size
- 29311 bytes
- Lines
- 1689
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/aspeed-gpio.hdt-bindings/i2c/i2c.hdt-bindings/leds/leds-pca955x.haspeed-g6.dtsiibm-power11-quad.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright 2024 IBM Corp.
/dts-v1/;
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/leds/leds-pca955x.h>
#include "aspeed-g6.dtsi"
#include "ibm-power11-quad.dtsi"
/ {
model = "Blueridge 2U";
compatible = "ibm,blueridge-bmc", "aspeed,ast2600";
aliases {
serial4 = &uart5;
i2c16 = &i2c2mux0;
i2c17 = &i2c2mux1;
i2c18 = &i2c2mux2;
i2c19 = &i2c2mux3;
i2c20 = &i2c4mux0chn0;
i2c21 = &i2c4mux0chn1;
i2c22 = &i2c4mux0chn2;
i2c23 = &i2c5mux0chn0;
i2c24 = &i2c5mux0chn1;
i2c25 = &i2c6mux0chn0;
i2c26 = &i2c6mux0chn1;
i2c27 = &i2c6mux0chn2;
i2c28 = &i2c6mux0chn3;
i2c29 = &i2c11mux0chn0;
i2c30 = &i2c11mux0chn1;
};
chosen {
stdout-path = &uart5;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
event_log: region@b3d00000 {
reg = <0xb3d00000 0x100000>;
no-map;
};
ramoops@b3e00000 {
compatible = "ramoops";
reg = <0xb3e00000 0x200000>; /* 16 * (4 * 0x8000) */
record-size = <0x8000>;
console-size = <0x8000>;
ftrace-size = <0x8000>;
pmsg-size = <0x8000>;
max-reason = <3>; /* KMSG_DUMP_EMERG */
};
/* LPC FW cycle bridge region requires natural alignment */
flash_memory: region@b4000000 {
reg = <0xb4000000 0x04000000>; /* 64M */
no-map;
};
/* VGA region is dictated by hardware strapping */
vga_memory: region@bf000000 {
Annotation
- Immediate include surface: `dt-bindings/gpio/aspeed-gpio.h`, `dt-bindings/i2c/i2c.h`, `dt-bindings/leds/leds-pca955x.h`, `aspeed-g6.dtsi`, `ibm-power11-quad.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.