arch/arm/boot/dts/aspeed/aspeed-bmc-qcom-dc-scm-v1.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/aspeed/aspeed-bmc-qcom-dc-scm-v1.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/aspeed/aspeed-bmc-qcom-dc-scm-v1.dts- Extension
.dts- Size
- 3515 bytes
- Lines
- 191
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
aspeed-g6.dtsiopenbmc-flash-layout-64.dtsiopenbmc-flash-layout-64-alt.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
/dts-v1/;
#include "aspeed-g6.dtsi"
/ {
model = "Qualcomm DC-SCM V1 BMC";
compatible = "qcom,dc-scm-v1-bmc", "aspeed,ast2600";
aliases {
serial4 = &uart5;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200n8";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
};
&mdio3 {
status = "okay";
ethphy3: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&mac2 {
status = "okay";
/* Bootloader sets up the MAC to insert delay */
phy-mode = "rgmii";
phy-handle = <ðphy3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii3_default>;
};
&mac3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii4_default>;
use-ncsi;
};
&rtc {
status = "okay";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <133000000>;
#include "openbmc-flash-layout-64.dtsi"
};
Annotation
- Immediate include surface: `aspeed-g6.dtsi`, `openbmc-flash-layout-64.dtsi`, `openbmc-flash-layout-64-alt.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.