arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/aspeed/ibm-power10-dual.dtsi- Extension
.dtsi- Size
- 6959 bytes
- Lines
- 387
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright 2023 IBM Corp.
&fsim0 {
status = "okay";
#address-cells = <2>;
#size-cells = <0>;
cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <0>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
i2c@1800 {
compatible = "ibm,fsi-i2c-master";
reg = <0x1800 0x400>;
#address-cells = <1>;
#size-cells = <0>;
cfam0_i2c0: i2c-bus@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>; /* OMI01 */
};
cfam0_i2c1: i2c-bus@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>; /* OMI23 */
};
cfam0_i2c10: i2c-bus@a {
#address-cells = <1>;
#size-cells = <0>;
reg = <10>; /* OP3A */
};
cfam0_i2c11: i2c-bus@b {
#address-cells = <1>;
#size-cells = <0>;
reg = <11>; /* OP3B */
};
cfam0_i2c12: i2c-bus@c {
#address-cells = <1>;
#size-cells = <0>;
reg = <12>; /* OP4A */
};
cfam0_i2c13: i2c-bus@d {
#address-cells = <1>;
#size-cells = <0>;
reg = <13>; /* OP4B */
};
cfam0_i2c14: i2c-bus@e {
#address-cells = <1>;
#size-cells = <0>;
reg = <14>; /* OP5A */
};
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.