arch/arm/boot/dts/broadcom/bcm-cygnus-clock.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/broadcom/bcm-cygnus-clock.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/broadcom/bcm-cygnus-clock.dtsi
Extension
.dtsi
Size
3975 bytes
Lines
134
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

clocks {
	#address-cells = <1>;
	#size-cells = <1>;
	ranges;

	osc: oscillator {
		#clock-cells = <0>;
		compatible = "fixed-clock";
		clock-frequency = <25000000>;
	};

	/* Cygnus ARM PLL */
	armpll: armpll@19000000 {
		#clock-cells = <0>;
		compatible = "brcm,cygnus-armpll";
		clocks = <&osc>;
		reg = <0x19000000 0x1000>;
	};

	/* peripheral clock for system timer */
	periph_clk: arm_periph_clk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&armpll>;
		clock-div = <2>;
		clock-mult = <1>;
	};

	/* APB bus clock */
	apb_clk: apb_clk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&armpll>;
		clock-div = <4>;
		clock-mult = <1>;
	};

	genpll: genpll@301d000 {
		#clock-cells = <1>;
		compatible = "brcm,cygnus-genpll";
		reg = <0x0301d000 0x2c>, <0x0301c020 0x4>;
		clocks = <&osc>;
		clock-output-names = "genpll", "axi21", "250mhz", "ihost_sys",
				     "enet_sw", "audio_125", "can";
	};

	/* always 1/2 of the axi21 clock */
	axi41_clk: axi41_clk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&genpll 1>;
		clock-div = <2>;
		clock-mult = <1>;
	};

	/* always 1/4 of the axi21 clock */
	axi81_clk: axi81_clk {
		#clock-cells = <0>;
		compatible = "fixed-factor-clock";
		clocks = <&genpll 1>;
		clock-div = <4>;
		clock-mult = <1>;
	};

	lcpll0: lcpll0@301d02c {
		#clock-cells = <1>;
		compatible = "brcm,cygnus-lcpll0";
		reg = <0x0301d02c 0x1c>, <0x0301c020 0x4>;
		clocks = <&osc>;
		clock-output-names = "lcpll0", "pcie_phy", "ddr_phy", "sdio",

Annotation

Implementation Notes