arch/arm/boot/dts/broadcom/bcm5301x-nand-cs0-bch8.dtsi

File Facts

System

Linux kernel

Corpus path

arch/arm/boot/dts/broadcom/bcm5301x-nand-cs0-bch8.dtsi

Extension

.dtsi

Size

393 bytes

Lines

18

Domain

Architecture Layer

Bucket

arch/arm

Inferred role

Architecture Layer: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• bcm5301x-nand-cs0.dtsi

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
 * Broadcom BCM470X / BCM5301X Nand chip defaults.
 *
 * This should be included if the NAND controller is on chip select 0
 * and uses 8 bit ECC.
 *
 * Copyright (C) 2015 Hauke Mehrtens <hauke@hauke-m.de>
 */

#include "bcm5301x-nand-cs0.dtsi"

&nandcs {
	nand-ecc-algo = "bch";
	nand-ecc-strength = <8>;
	nand-ecc-step-size = <512>;
};

Annotation

• Immediate include surface: `bcm5301x-nand-cs0.dtsi`.
• Atlas domain: Architecture Layer / arch/arm.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.