arch/arm/boot/dts/broadcom/bcm53573.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/broadcom/bcm53573.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/broadcom/bcm53573.dtsi- Extension
.dtsi- Size
- 5051 bytes
- Lines
- 267
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.hdt-bindings/input/input.hdt-bindings/interrupt-controller/irq.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x0>;
};
};
mpcore@18310000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18310000 0x00008000>;
#address-cells = <1>;
#size-cells = <1>;
gic: interrupt-controller@1000 {
compatible = "arm,cortex-a7-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x1000 0x1000>,
<0x2000 0x0100>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
alp: oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <40000000>;
};
};
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `dt-bindings/input/input.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.