arch/arm/boot/dts/hisilicon/hisi-x5hd2.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/hisilicon/hisi-x5hd2.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/hisilicon/hisi-x5hd2.dtsi
Extension
.dtsi
Size
13908 bytes
Lines
559
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2013-2014 Linaro Ltd.
 * Copyright (c) 2013-2014 HiSilicon Limited.
 */

#include <dt-bindings/clock/hix5hd2-clock.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		serial0 = &uart0;
	};

	gic: interrupt-controller@f8a01000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		#address-cells = <0>;
		interrupt-controller;
		/* gic dist base, gic cpu base */
		reg = <0xf8a01000 0x1000>, <0xf8a00100 0x100>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&gic>;
		ranges = <0 0xf8000000 0x8000000>;

		amba-bus {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			ranges;

			timer0: timer@2000 {
				compatible = "arm,sp804", "arm,primecell";
				reg = <0x00002000 0x1000>;
				/* timer00 & timer01 */
				interrupts = <0 24 4>;
				clocks = <&clock HIX5HD2_FIXED_24M>;
				status = "disabled";
			};

			timer1: timer@a29000 {
				/*
				 * Only used in NORMAL state, not available ins
				 * SLOW or DOZE state.
				 * The rate is fixed in 24MHz.
				 */
				compatible = "arm,sp804", "arm,primecell";
				reg = <0x00a29000 0x1000>;
				/* timer10 & timer11 */
				interrupts = <0 25 4>;
				clocks = <&clock HIX5HD2_FIXED_24M>;
				status = "disabled";
			};

			timer2: timer@a2a000 {
				compatible = "arm,sp804", "arm,primecell";
				reg = <0x00a2a000 0x1000>;
				/* timer20 & timer21 */
				interrupts = <0 26 4>;
				clocks = <&clock HIX5HD2_FIXED_24M>;
				status = "disabled";
			};

Annotation

Implementation Notes