arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/intel/ixp/intel-ixp42x-actiontec-mi424wr-d.dts
Extension
.dts
Size
863 bytes
Lines
50
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: ISC
/*
 * Device Tree file for the IXP425-based Actiontec MI424WR revision D
 * Based on a board file from OpenWrt by Jose Vasconcellos.
 */

/dts-v1/;

#include "intel-ixp42x-actiontec-mi424wr.dtsi"

/ {
	model = "Actiontec MI424WR rev D";
	compatible = "actiontec,mi424wr-d", "intel,ixp42x";

	/* Connect the switch to EthB */
	spi {
		ethernet-switch@0 {
			ethernet-ports {
				ethernet-port@4 {
					ethernet = <&ethb>;
				};
			};
		};
	};

	soc {
		/* EthB used for LAN */
		ethernet@c8009000 {
			/* Fixed link to the CPU MII port on the KS8995 */
			fixed-link {
				speed = <100>;
				full-duplex;
			};

			mdio {
				/* PHY ID 0x00221450 */
				phy5: ethernet-phy@5 {
					/* WAN */
					reg = <5>;
				};
			};
		};

		/* EthC used for WAN */
		ethernet@c800a000 {
			phy-handle = <&phy5>; // 5 on revision D
		};
	};
};

Annotation

Implementation Notes