arch/arm/boot/dts/intel/ixp/intel-ixp42x-adi-coyote.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/ixp/intel-ixp42x-adi-coyote.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/intel/ixp/intel-ixp42x-adi-coyote.dts- Extension
.dts- Size
- 2693 bytes
- Lines
- 113
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
intel-ixp42x.dtsidt-bindings/input/input.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: ISC
/*
* Device Tree file for ADI Engineering Coyote platform.
* Derived from boardfiles written by MontaVista software.
* Ethernet set-up from OpenWrt.
*/
/dts-v1/;
#include "intel-ixp42x.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "ADI Engineering Coyote reference design";
compatible = "adieng,coyote", "intel,ixp42x";
#address-cells = <1>;
#size-cells = <1>;
memory@0 {
/* CHECKME: 16 MB SDRAM minimum, maybe the Coyote actually has more */
device_type = "memory";
reg = <0x00000000 0x01000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait";
stdout-path = "uart1:115200n8";
};
aliases {
/* These are switched around */
serial0 = &uart1;
serial1 = &uart0;
};
soc {
bus@c4000000 {
flash@0,0 {
compatible = "intel,ixp4xx-flash", "cfi-flash";
bank-width = <2>;
/*
* 32 MB of Flash in 128 0x20000 sized blocks
* mapped in at CS0 and CS1
*/
reg = <0 0x00000000 0x2000000>;
/* Configure expansion bus to allow writes */
intel,ixp4xx-eb-write-enable = <1>;
partitions {
compatible = "redboot-fis";
/* CHECKME: guess this is Redboot FIS */
fis-index-block = <0x1ff>;
};
};
};
pci@c0000000 {
status = "okay";
/*
* Taken from Coyote PCI boardfile.
* We have slots (IDSEL) 1 and 2 with one assigned IRQ
* each handling all IRQs.
*/
#interrupt-cells = <1>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map =
/* IDSEL 1 */
<0x0800 0 0 1 &gpio0 6 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 1 is irq 6 */
Annotation
- Immediate include surface: `intel-ixp42x.dtsi`, `dt-bindings/input/input.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.