arch/arm/boot/dts/intel/ixp/intel-ixp42x-arcom-vulcan.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/ixp/intel-ixp42x-arcom-vulcan.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/intel/ixp/intel-ixp42x-arcom-vulcan.dts- Extension
.dts- Size
- 4402 bytes
- Lines
- 170
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
intel-ixp42x.dtsidt-bindings/input/input.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: ISC
/*
* Device Tree file for the Arcom/Eurotech Vulcan board.
* This board is a single board computer in the PC/104 form factor based on
* IXP425, and was released around 2005. It previously had the name "Mercury".
*/
/dts-v1/;
#include "intel-ixp42x.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Arcom/Eurotech Vulcan";
compatible = "arcom,vulcan", "intel,ixp42x";
#address-cells = <1>;
#size-cells = <1>;
memory@0 {
device_type = "memory";
reg = <0x00000000 0x4000000>;
};
chosen {
/* CHECKME: using a harddrive at /dev/sda1 as rootfs by default */
bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootfstype=ext4 rootwait";
stdout-path = "uart0:115200n8";
};
aliases {
serial0 = &uart0;
};
onewire {
compatible = "w1-gpio";
gpios = <&gpio0 14 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
};
soc {
bus@c4000000 {
flash@0,0 {
compatible = "intel,ixp4xx-flash", "cfi-flash";
bank-width = <2>;
/*
* 32 MB of Flash in 0x20000 byte blocks
* mapped in at CS0 and CS1.
*
* The documentation mentions the existence
* of a 16MB version, which we conveniently
* ignore. Shout if you own one!
*/
reg = <0 0x00000000 0x2000000>;
/* Expansion bus settings */
intel,ixp4xx-eb-t3 = <3>;
intel,ixp4xx-eb-byte-access-on-halfword = <1>;
intel,ixp4xx-eb-write-enable = <1>;
partitions {
compatible = "redboot-fis";
fis-index-block = <0x1ff>;
};
};
sram@2,0 {
/* 256 KB SDRAM memory at CS2 */
compatible = "shared-dma-pool";
device_type = "memory";
reg = <2 0x00000000 0x40000>;
no-map;
/* Expansion bus settings */
Annotation
- Immediate include surface: `intel-ixp42x.dtsi`, `dt-bindings/input/input.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.