arch/arm/boot/dts/intel/ixp/intel-ixp42x-ixdpg425.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/ixp/intel-ixp42x-ixdpg425.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/intel/ixp/intel-ixp42x-ixdpg425.dts- Extension
.dts- Size
- 3282 bytes
- Lines
- 128
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
intel-ixp42x.dtsidt-bindings/input/input.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: ISC
/*
* Device Tree file for the Intel IXDPG425 reference design.
* Derived from boardfiles written by MontaVista software.
* Ethernet set-up from OpenWrt.
*
* The device has 4 x FXS RJ11 ports for analog phones for
* internet telephony. (Not supported yet.)
*
* The device has 9 status LEDs we do not support yet.
*
* This device is very similar to ADI engingeering Coyote.
*/
/dts-v1/;
#include "intel-ixp42x.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Intel IXDPG425 reference design";
compatible = "intel,ixdpg425", "intel,ixp42x";
#address-cells = <1>;
#size-cells = <1>;
memory@0 {
/* 32 MB SDRAM */
device_type = "memory";
reg = <0x00000000 0x02000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8 root=/dev/sda1 rw rootwait";
stdout-path = "uart0:115200n8";
};
aliases {
serial0 = &uart0;
};
soc {
bus@c4000000 {
flash@0,0 {
compatible = "intel,ixp4xx-flash", "cfi-flash";
bank-width = <2>;
/*
* CHECKME: the product brief says 16MB in a flash
* socket.
*/
reg = <0 0x00000000 0x1000000>;
/* Configure expansion bus to allow writes */
intel,ixp4xx-eb-write-enable = <1>;
partitions {
compatible = "redboot-fis";
/* CHECKME: guess this is Redboot FIS */
fis-index-block = <0x7f>;
};
};
};
pci@c0000000 {
status = "okay";
/*
* Taken from IXDPG425 PCI boardfile.
* We have slots (IDSEL) 12, 13 and 14 with one assigned IRQ
* for 12 & 13 and one for 14.
*/
Annotation
- Immediate include surface: `intel-ixp42x.dtsi`, `dt-bindings/input/input.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.