arch/arm/boot/dts/intel/ixp/intel-ixp4xx-reference-design.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/ixp/intel-ixp4xx-reference-design.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/intel/ixp/intel-ixp4xx-reference-design.dtsi
Extension
.dtsi
Size
4038 bytes
Lines
135
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: ISC
/*
 * Device Tree include file for Intel reference designs for the
 * XScale Network Processors in the IXP 4xx series. Common device
 * set-up for IXDP425, IXCDP1100, KIXRP435 and IXDP465.
 */

/ {
	memory@0 {
		/*
		 * The board supports up to 256 MB of memory. Here we put in
		 * 64 MB and this may be modified by the boot loader.
		 */
		device_type = "memory";
		reg = <0x00000000 0x4000000>;
	};

	chosen {
		bootargs = "console=ttyS0,115200n8";
		stdout-path = "uart0:115200n8";
	};

	aliases {
		serial0 = &uart0;
	};

	i2c {
		compatible = "i2c-gpio";
		sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
		scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
		#address-cells = <1>;
		#size-cells = <0>;

		eeprom@50 {
			/*
			 * Philips PCF8582C-2T/03 512byte I2C EEPROM
			 * should behave like an Atmel 24c04.
			 */
			compatible = "atmel,24c04";
			reg = <0x50>;
			pagesize = <16>;
			size = <512>;
			read-only;
		};
	};

	soc {
		bus@c4000000 {
			/* Flash memory defined per-variant */
			nand-controller@3,0 {
				/* Some designs have a NAND on CS3 enable it here if present */
				status = "disabled";

				/*
				 * gen_nand needs to be extended and documented to get
				 * command byte = 1 and address byte = 2 from the device
				 * tree.
				 */
				compatible = "gen_nand";

				/* Expansion bus set-up */
				intel,ixp4xx-eb-t1 = <0>;
				intel,ixp4xx-eb-t2 = <0>;
				intel,ixp4xx-eb-t3 = <1>; // 1 cycle extra strobe phase
				intel,ixp4xx-eb-t4 = <0>;
				intel,ixp4xx-eb-t5 = <0>;
				intel,ixp4xx-eb-cycle-type = <0>; // Intel cycle type
				intel,ixp4xx-eb-byte-access-on-halfword = <0>;
				intel,ixp4xx-eb-mux-address-and-data = <0>;
				intel,ixp4xx-eb-ahb-split-transfers = <0>;

Annotation

Implementation Notes