arch/arm/boot/dts/intel/pxa/pxa27x.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/pxa/pxa27x.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/intel/pxa/pxa27x.dtsi- Extension
.dtsi- Size
- 4342 bytes
- Lines
- 189
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
pxa2xx.dtsidt-bindings/clock/pxa-clock.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/* The pxa3xx skeleton simply augments the 2xx version */
#include "pxa2xx.dtsi"
#include "dt-bindings/clock/pxa-clock.h"
/ {
model = "Marvell PXA27x familiy SoC";
compatible = "marvell,pxa27x";
pxabus {
pdma: dma-controller@40000000 {
compatible = "marvell,pdma-1.0";
reg = <0x40000000 0x10000>;
interrupts = <25>;
#dma-cells = <2>;
/* For backwards compatibility: */
#dma-channels = <32>;
dma-channels = <32>;
#dma-requests = <75>;
dma-requests = <75>;
status = "okay";
};
pxairq: interrupt-controller@40d00000 {
marvell,intc-priority;
marvell,intc-nr-irqs = <34>;
};
pinctrl: pinctrl@40e00000 {
reg = <0x40e00054 0x20 0x40e0000c 0xc 0x40e0010c 4
0x40f00020 0x10>;
compatible = "marvell,pxa27x-pinctrl";
};
gpio: gpio@40e00000 {
compatible = "intel,pxa27x-gpio";
gpio-ranges = <&pinctrl 0 0 128>;
clocks = <&clks CLK_NONE>;
};
usb0: usb@4c000000 {
compatible = "marvell,pxa-ohci";
reg = <0x4c000000 0x10000>;
interrupts = <3>;
clocks = <&clks CLK_USBHOST>;
status = "disabled";
};
pwm0: pwm@40b00000 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40b00000 0x10>;
#pwm-cells = <1>;
clocks = <&clks CLK_PWM0>;
};
pwm1: pwm@40b00010 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40b00010 0x10>;
#pwm-cells = <1>;
clocks = <&clks CLK_PWM1>;
};
pwm2: pwm@40c00000 {
compatible = "marvell,pxa270-pwm", "marvell,pxa250-pwm";
reg = <0x40c00000 0x10>;
#pwm-cells = <1>;
clocks = <&clks CLK_PWM0>;
};
pwm3: pwm@40c00010 {
Annotation
- Immediate include surface: `pxa2xx.dtsi`, `dt-bindings/clock/pxa-clock.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.