arch/arm/boot/dts/intel/pxa/pxa300-raumfeld-tuneable-clock.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/pxa/pxa300-raumfeld-tuneable-clock.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/intel/pxa/pxa300-raumfeld-tuneable-clock.dtsi- Extension
.dtsi- Size
- 1719 bytes
- Lines
- 86
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/maxim,max9485.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/maxim,max9485.h>
/ {
xo_27mhz: oscillator-27mhz {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
clock-accuracy = <100>;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "Raumfeld Speaker";
#address-cells = <1>;
#size-cells = <0>;
simple-audio-card,dai-link@0 {
reg = <0>;
format = "i2s";
bitclock-master = <&dailink_master_analog>;
frame-master = <&dailink_master_analog>;
mclk-fs = <256>;
dailink_master_analog: cpu {
sound-dai = <&ssp_dai0>;
};
codec {
sound-dai = <&cs4270>;
};
};
};
};
&ssp_dai0 {
clocks = <&max9485 MAX9485_CLKOUT1>;
};
&ssp_dai1 {
clocks = <&max9485 MAX9485_CLKOUT1>;
};
&pxai2c1 {
cs4270: codec@48 {
compatible = "cirrus,cs4270";
pinctrl-names = "default";
pinctrl-0 = <&cs4270_pins>;
reg = <0x48>;
va-supply = <®_va_5v0>;
vd-supply = <®_3v3>;
vlc-supply = <®_3v3>;
reset-gpios = <&gpio 120 GPIO_ACTIVE_HIGH>;
#sound-dai-cells = <0>;
};
max9485: clock-generator@63 {
compatible = "maxim,max9485";
pinctrl-names = "default";
pinctrl-0 = <&max9485_pins>;
reg = <0x63>;
vdd-supply = <®_3v3>;
clock-names = "xclk";
clocks = <&xo_27mhz>;
reset-gpios = <&gpio 111 GPIO_ACTIVE_HIGH>;
#clock-cells = <1>;
};
};
Annotation
- Immediate include surface: `dt-bindings/clock/maxim,max9485.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.