arch/arm/boot/dts/intel/socfpga/socfpga_arria5_socdk.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/socfpga/socfpga_arria5_socdk.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/intel/socfpga/socfpga_arria5_socdk.dts- Extension
.dts- Size
- 2539 bytes
- Lines
- 150
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
socfpga_arria5.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Altera Corporation <www.altera.com>
*/
#include "socfpga_arria5.dtsi"
/ {
model = "Altera SOCFPGA Arria V SoC Development Kit";
compatible = "altr,socfpga-arria5-socdk", "altr,socfpga-arria5", "altr,socfpga";
chosen {
bootargs = "earlyprintk";
stdout-path = "serial0:115200n8";
};
memory@0 {
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
};
aliases {
/* this allow the ethaddr uboot environmnet variable contents
* to be added to the gmac1 device tree blob.
*/
ethernet0 = &gmac1;
};
leds {
compatible = "gpio-leds";
led-hps0 {
label = "hps_led0";
gpios = <&porta 0 1>;
};
led-hps1 {
label = "hps_led1";
gpios = <&portb 11 1>;
};
led-hps2 {
label = "hps_led2";
gpios = <&porta 17 1>;
};
led-hps3 {
label = "hps_led3";
gpios = <&porta 18 1>;
};
};
regulator_3_3v: regulator {
compatible = "regulator-fixed";
regulator-name = "3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";
rxd0-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd3-skew-ps = <0>;
txen-skew-ps = <0>;
txc-skew-ps = <2600>;
Annotation
- Immediate include surface: `socfpga_arria5.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.