arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_chameleon96.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_chameleon96.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_chameleon96.dts- Extension
.dts- Size
- 2084 bytes
- Lines
- 131
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.hsocfpga_cyclone5.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Device Tree file for the Chameleon96
*
* Copyright (c) 2018 Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
*/
#include <dt-bindings/gpio/gpio.h>
#include "socfpga_cyclone5.dtsi"
/ {
model = "Novetech Chameleon96";
compatible = "novtech,chameleon96", "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bootargs = "earlyprintk";
stdout-path = "serial0:115200n8";
};
memory@0 {
name = "memory";
device_type = "memory";
reg = <0x0 0x20000000>; /* 512MB */
};
regulator_3_3v: regulator {
compatible = "regulator-fixed";
regulator-name = "3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
leds {
compatible = "gpio-leds";
user_led1 {
label = "green:user1";
gpios = <&porta 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "heartbeat";
};
user_led2 {
label = "green:user2";
gpios = <&porta 22 GPIO_ACTIVE_LOW>;
linux,default-trigger = "mmc0";
};
user_led3 {
label = "green:user3";
gpios = <&porta 25 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
};
user_led4 {
label = "green:user4";
gpios = <&portb 3 GPIO_ACTIVE_LOW>;
panic-indicator;
linux,default-trigger = "none";
};
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `socfpga_cyclone5.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.