arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi- Extension
.dtsi- Size
- 2531 bytes
- Lines
- 144
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
socfpga_cyclone5.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com
*/
#include "socfpga_cyclone5.dtsi"
/ {
model = "Enclustra Mercury SA1";
compatible = "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
ethernet0 = &gmac1;
};
/* Adjusted the i2c labels to use generic base-board dtsi files for
* Enclustra Arria10 and Cyclone5 SoMs.
*
* The set of i2c0 and i2c1 labels defined in socfpga_cyclone5.dtsi and in
* socfpga_arria10.dtsi do not allow for using the same base-board .dtsi
* fragments. Thus define generic labels here to match the correct i2c
* bus in a generic base-board .dtsi file.
*/
soc {
i2c_encl: i2c@ffc04000 {
};
i2c_encl_fpga: i2c@ffc05000 {
};
};
memory {
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
};
};
&osc1 {
clock-frequency = <50000000>;
};
&i2c_encl {
i2c-sda-hold-time-ns = <300>;
clock-frequency = <100000>;
status = "okay";
isl12020: rtc@6f {
compatible = "isil,isl12022";
reg = <0x6f>;
};
};
&i2c_encl_fpga {
i2c-sda-hold-time-ns = <300>;
status = "disabled";
};
&uart0 {
clock-frequency = <100000000>;
};
&mmc0 {
status = "okay";
/delete-property/ cap-mmc-highspeed;
/delete-property/ cap-sd-highspeed;
};
Annotation
- Immediate include surface: `socfpga_cyclone5.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.