arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sockit.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sockit.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sockit.dts- Extension
.dts- Size
- 3543 bytes
- Lines
- 188
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
socfpga_cyclone5.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013 Steffen Trumtrar <s.trumtrar@pengutronix.de>
*/
#include "socfpga_cyclone5.dtsi"
/ {
model = "Terasic SoCkit";
compatible = "terasic,socfpga-cyclone5-sockit", "altr,socfpga-cyclone5", "altr,socfpga";
chosen {
bootargs = "earlyprintk";
stdout-path = "serial0:115200n8";
};
memory@0 {
name = "memory";
device_type = "memory";
reg = <0x0 0x40000000>; /* 1GB */
};
aliases {
/* this allow the ethaddr uboot environmnet variable contents
* to be added to the gmac1 device tree blob.
*/
ethernet0 = &gmac1;
};
leds {
compatible = "gpio-leds";
hps_led0 {
label = "hps:blue:led0";
gpios = <&portb 24 0>; /* HPS_GPIO53 */
linux,default-trigger = "heartbeat";
};
hps_led1 {
label = "hps:blue:led1";
gpios = <&portb 25 0>; /* HPS_GPIO54 */
linux,default-trigger = "heartbeat";
};
hps_led2 {
label = "hps:blue:led2";
gpios = <&portb 26 0>; /* HPS_GPIO55 */
linux,default-trigger = "heartbeat";
};
hps_led3 {
label = "hps:blue:led3";
gpios = <&portb 27 0>; /* HPS_GPIO56 */
linux,default-trigger = "heartbeat";
};
};
gpio-keys {
compatible = "gpio-keys";
hps_sw0 {
label = "hps_sw0";
gpios = <&portc 20 0>; /* HPS_GPI7 */
linux,input-type = <5>; /* EV_SW */
linux,code = <0x0>; /* SW_LID */
};
hps_sw1 {
label = "hps_sw1";
gpios = <&portc 19 0>; /* HPS_GPI6 */
Annotation
- Immediate include surface: `socfpga_cyclone5.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.