arch/arm/boot/dts/intel/socfpga/socfpga.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/intel/socfpga/socfpga.dtsi
Extension
.dtsi
Size
23448 bytes
Lines
987
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright (C) 2012 Altera <www.altera.com>
 */

#include <dt-bindings/reset/altr,rst-mgr.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		serial0 = &uart0;
		serial1 = &uart1;
		timer0 = &timer0;
		timer1 = &timer1;
		timer2 = &timer2;
		timer3 = &timer3;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "altr,socfpga-smp";

		cpu0: cpu@0 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <0>;
			next-level-cache = <&L2>;
		};
		cpu1: cpu@1 {
			compatible = "arm,cortex-a9";
			device_type = "cpu";
			reg = <1>;
			next-level-cache = <&L2>;
		};
	};

	pmu: pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupt-parent = <&intc>;
		interrupts = <0 176 4>, <0 177 4>;
		interrupt-affinity = <&cpu0>, <&cpu1>;
	};

	intc: interrupt-controller@fffed000 {
		compatible = "arm,cortex-a9-gic";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0xfffed000 0x1000>,
		      <0xfffec100 0x100>;
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		device_type = "soc";
		interrupt-parent = <&intc>;
		ranges;

		amba {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;

			pdma: pdma@ffe01000 {
				compatible = "arm,pl330", "arm,primecell";

Annotation

Implementation Notes