arch/arm/boot/dts/marvell/armada-xp-gp.dts

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/marvell/armada-xp-gp.dts

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/marvell/armada-xp-gp.dts
Extension
.dts
Size
4942 bytes
Lines
231
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Marvell Armada XP development board
 * (DB-MV784MP-GP)
 *
 * Copyright (C) 2013-2014 Marvell
 *
 * Lior Amsalem <alior@marvell.com>
 * Gregory CLEMENT <gregory.clement@free-electrons.com>
 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
 *
 * Note: this Device Tree assumes that the bootloader has remapped the
 * internal registers to 0xf1000000 (instead of the default
 * 0xd0000000). The 0xf1000000 is the default used by the recent,
 * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
 * boards were delivered with an older version of the bootloader that
 * left internal registers mapped at 0xd0000000. If you are in this
 * situation, you should either update your bootloader (preferred
 * solution) or the below Device Tree should be adjusted.
 */

/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "armada-xp-mv78460.dtsi"

/ {
	model = "Marvell Armada XP Development Board DB-MV784MP-GP";
	compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";

	chosen {
		stdout-path = "serial0:115200n8";
	};

	memory@0 {
		device_type = "memory";
		/*
                 * 8 GB of plug-in RAM modules by default.The amount
                 * of memory available can be changed by the
                 * bootloader according the size of the module
                 * actually plugged. However, memory between
                 * 0xF0000000 to 0xFFFFFFFF cannot be used, as it is
                 * the address range used for I/O (internal registers,
                 * MBus windows).
		 */
		reg = <0x00000000 0x00000000 0x00000000 0xf0000000>,
		      <0x00000001 0x00000000 0x00000001 0x00000000>;
	};

	cpus {
		pm_pic {
			ctrl-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>,
				     <&gpio0 17 GPIO_ACTIVE_LOW>,
				     <&gpio0 18 GPIO_ACTIVE_LOW>;
		};
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
			  MBUS_ID(0x01, 0x2f) 0 0 0xf0000000 0x1000000
			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
			  MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;

		devbus-bootcs {
			status = "okay";

			/* Device Bus parameters are required */

			/* Read parameters */

Annotation

Implementation Notes