arch/arm/boot/dts/marvell/dove-dove-db.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/marvell/dove-dove-db.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/marvell/dove-dove-db.dts- Extension
.dts- Size
- 658 bytes
- Lines
- 40
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dove.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "dove.dtsi"
/ {
model = "Marvell DB-MV88AP510-BP Development Board";
compatible = "marvell,dove-db", "marvell,dove";
memory {
device_type = "memory";
reg = <0x00000000 0x40000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
};
};
&uart0 { status = "okay"; };
&uart1 { status = "okay"; };
&sdio0 { status = "okay"; };
&sdio1 { status = "okay"; };
&sata0 { status = "okay"; };
&spi0 {
status = "okay";
/* spi0.0: 4M Flash ST-M25P32-VMF6P */
flash@0 {
compatible = "st,m25p32";
spi-max-frequency = <20000000>;
reg = <0>;
};
};
&i2c0 {
status = "okay";
};
Annotation
- Immediate include surface: `dove.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.