arch/arm/boot/dts/marvell/dove.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/marvell/dove.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/marvell/dove.dtsi- Extension
.dtsi- Size
- 19023 bytes
- Lines
- 821
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.hdt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "marvell,dove";
model = "Marvell Armada 88AP510 SoC";
interrupt-parent = <&intc>;
aliases {
gpio0 = &gpio0;
gpio1 = &gpio1;
gpio2 = &gpio2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "marvell,pj4a", "marvell,sheeva-v7";
device_type = "cpu";
next-level-cache = <&l2>;
reg = <0>;
};
};
l2: l2-cache {
compatible = "marvell,tauros2-cache";
marvell,tauros2-cache-features = <0>;
};
gpu-subsystem {
compatible = "marvell,dove-gpu-subsystem";
cores = <&gpu>;
status = "disabled";
};
i2c-mux {
compatible = "i2c-mux-pinctrl";
#address-cells = <1>;
#size-cells = <0>;
i2c-parent = <&i2c>;
pinctrl-names = "i2c0", "i2c1", "i2c2";
pinctrl-0 = <&pmx_i2cmux_0>;
pinctrl-1 = <&pmx_i2cmux_1>;
pinctrl-2 = <&pmx_i2cmux_2>;
i2c0: i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
};
i2c1: i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
/* Requires pmx_i2c1 on i2c controller node */
status = "disabled";
};
i2c2: i2c@2 {
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.