arch/arm/boot/dts/marvell/kirkwood.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/marvell/kirkwood.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/marvell/kirkwood.dtsi
Extension
.dtsi
Size
9140 bytes
Lines
395
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>

#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	compatible = "marvell,kirkwood";
	interrupt-parent = <&intc>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "marvell,feroceon";
			reg = <0>;
			clocks = <&core_clk 1>, <&core_clk 3>, <&gate_clk 11>;
			clock-names = "cpu_clk", "ddrclk", "powersave";
		};
	};

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		i2c0 = &i2c0;
	};

	mbus@f1000000 {
		compatible = "marvell,kirkwood-mbus", "simple-bus";
		#address-cells = <2>;
		#size-cells = <1>;
		/* If a board file needs to change this ranges it must replace it completely */
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000	/* internal-regs */
			  MBUS_ID(0x01, 0x2f) 0 0xf4000000 0x10000	/* nand flash */
			  MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000	/* crypto sram */
			  >;
		controller = <&mbusc>;
		pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
		pcie-io-aperture  = <0xf2000000 0x100000>;   /*   1 MiB    I/O space */

		nand: nand@12f {
			#address-cells = <1>;
			#size-cells = <1>;
			cle = <0>;
			ale = <1>;
			bank-width = <1>;
			compatible = "marvell,orion-nand";
			reg = <MBUS_ID(0x01, 0x2f) 0 0x400>;
			chip-delay = <25>;
			/* set partition map and/or chip-delay in board dts */
			clocks = <&gate_clk 7>;
			pinctrl-0 = <&pmx_nand>;
			pinctrl-names = "default";
			status = "disabled";
		};

		crypto_sram: sa-sram@301 {
			compatible = "mmio-sram";
			reg = <MBUS_ID(0x03, 0x01) 0x0 0x800>;
			clocks = <&gate_clk 17>;
			#address-cells = <1>;
			#size-cells = <1>;
		};
	};

	ocp@f1000000 {

Annotation

Implementation Notes