arch/arm/boot/dts/marvell/mmp2.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/marvell/mmp2.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/marvell/mmp2.dtsi- Extension
.dtsi- Size
- 12863 bytes
- Lines
- 517
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/marvell,mmp2.hdt-bindings/power/marvell,mmp2.hdt-bindings/clock/marvell,mmp2-audio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Marvell Technology Group Ltd.
* Author: Haojian Zhuang <haojian.zhuang@marvell.com>
*/
#include <dt-bindings/clock/marvell,mmp2.h>
#include <dt-bindings/power/marvell,mmp2.h>
#include <dt-bindings/clock/marvell,mmp2-audio.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
serial0 = &uart1;
serial1 = &uart2;
serial2 = &uart3;
serial3 = &uart4;
i2c0 = &twsi1;
i2c1 = &twsi2;
};
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
interrupt-parent = <&intc>;
ranges;
L2: l2-cache {
compatible = "marvell,tauros2-cache";
marvell,tauros2-cache-features = <0x3>;
};
axi@d4200000 { /* AXI */
compatible = "mrvl,axi-bus", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
reg = <0xd4200000 0x00200000>;
ranges;
gpu: gpu@d420d000 {
compatible = "vivante,gc";
reg = <0xd420d000 0x4000>;
interrupts = <8>;
status = "disabled";
clocks = <&soc_clocks MMP2_CLK_GPU_3D>,
<&soc_clocks MMP2_CLK_GPU_BUS>;
clock-names = "core", "bus";
power-domains = <&soc_clocks MMP2_POWER_DOMAIN_GPU>;
};
intc: interrupt-controller@d4282000 {
compatible = "mrvl,mmp2-intc";
interrupt-controller;
#interrupt-cells = <1>;
reg = <0xd4282000 0x1000>;
mrvl,intc-nr-irqs = <64>;
};
intcmux4: interrupt-controller@d4282150 {
compatible = "mrvl,mmp2-mux-intc";
interrupts = <4>;
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x150 0x4>, <0x168 0x4>;
reg-names = "mux status", "mux mask";
mrvl,intc-nr-irqs = <2>;
};
Annotation
- Immediate include surface: `dt-bindings/clock/marvell,mmp2.h`, `dt-bindings/power/marvell,mmp2.h`, `dt-bindings/clock/marvell,mmp2-audio.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.