arch/arm/boot/dts/marvell/mmp3.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/marvell/mmp3.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/marvell/mmp3.dtsi
Extension
.dtsi
Size
15961 bytes
Lines
609
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 *  Copyright (C) 2019 Lubomir Rintel <lkundrak@v3.sk>
 */

#include <dt-bindings/clock/marvell,mmp2.h>
#include <dt-bindings/power/marvell,mmp2.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "marvell,mmp3-smp";

		cpu@0 {
			compatible = "marvell,pj4b";
			device_type = "cpu";
			next-level-cache = <&l2>;
			reg = <0>;
		};

		cpu@1 {
			compatible = "marvell,pj4b";
			device_type = "cpu";
			next-level-cache = <&l2>;
			reg = <1>;
		};
	};

	soc {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		interrupt-parent = <&gic>;
		ranges;

		axi@d4200000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0xd4200000 0x00200000>;
			ranges;

			interrupt-controller@d4282000 {
				compatible = "marvell,mmp3-intc";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0xd4282000 0x1000>,
				      <0xd4284000 0x100>;
				mrvl,intc-nr-irqs = <64>;
			};

			pmic_mux: interrupt-controller@d4282150 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x150 0x4>, <0x168 0x4>;
				reg-names = "mux status", "mux mask";
				mrvl,intc-nr-irqs = <4>;
			};

			rtc_mux: interrupt-controller@d4282154 {
				compatible = "mrvl,mmp2-mux-intc";
				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-controller;

Annotation

Implementation Notes