arch/arm/boot/dts/marvell/orion5x.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/marvell/orion5x.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/marvell/orion5x.dtsi- Extension
.dtsi- Size
- 5415 bytes
- Lines
- 237
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2012 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Marvell Orion5x SoC";
compatible = "marvell,orion5x";
interrupt-parent = <&intc>;
aliases {
gpio0 = &gpio0;
};
soc {
#address-cells = <2>;
#size-cells = <1>;
controller = <&mbusc>;
devbus_bootcs: devbus-bootcs {
compatible = "marvell,orion-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x1046C 0x4>;
ranges = <0 MBUS_ID(0x01, 0x0f) 0 0xffffffff>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&core_clk 0>;
status = "disabled";
};
devbus_cs0: devbus-cs0 {
compatible = "marvell,orion-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x1045C 0x4>;
ranges = <0 MBUS_ID(0x01, 0x1e) 0 0xffffffff>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&core_clk 0>;
status = "disabled";
};
devbus_cs1: devbus-cs1 {
compatible = "marvell,orion-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10460 0x4>;
ranges = <0 MBUS_ID(0x01, 0x1d) 0 0xffffffff>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&core_clk 0>;
status = "disabled";
};
devbus_cs2: devbus-cs2 {
compatible = "marvell,orion-devbus";
reg = <MBUS_ID(0xf0, 0x01) 0x10464 0x4>;
ranges = <0 MBUS_ID(0x01, 0x1b) 0 0xffffffff>;
#address-cells = <1>;
#size-cells = <1>;
clocks = <&core_clk 0>;
status = "disabled";
};
internal-regs {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;
gpio0: gpio@10100 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.