arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/marvell/orion5x-rd88f5182-nas.dts- Extension
.dts- Size
- 3184 bytes
- Lines
- 174
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.horion5x-mv88f5182.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "orion5x-mv88f5182.dtsi"
/ {
model = "Marvell Reference Design 88F5182 NAS";
compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x";
memory {
device_type = "memory";
reg = <0x00000000 0x4000000>; /* 64 MB */
};
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
<MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x80000>,
<MBUS_ID(0x01, 0x1d) 0 0xfc000000 0x1000000>;
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_debug_led>;
pinctrl-names = "default";
led-0 {
label = "rd88f5182:cpu";
linux,default-trigger = "heartbeat";
gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
};
};
};
&devbus_bootcs {
status = "okay";
/* Read parameters */
devbus,bus-width = <8>;
devbus,turn-off-ps = <90000>;
devbus,badr-skew-ps = <0>;
devbus,acc-first-ps = <186000>;
devbus,acc-next-ps = <186000>;
/* Write parameters */
devbus,wr-high-ps = <90000>;
devbus,wr-low-ps = <90000>;
devbus,ale-wr-ps = <90000>;
flash@0 {
compatible = "cfi-flash";
reg = <0 0x80000>;
bank-width = <1>;
};
};
&devbus_cs1 {
status = "okay";
/* Read parameters */
devbus,bus-width = <8>;
devbus,turn-off-ps = <90000>;
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `orion5x-mv88f5182.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.