arch/arm/boot/dts/mediatek/mt6582-prestigio-pmt5008-3g.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/mediatek/mt6582-prestigio-pmt5008-3g.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/mediatek/mt6582-prestigio-pmt5008-3g.dts- Extension
.dts- Size
- 583 bytes
- Lines
- 44
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
mt6582.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 2021 Maxim Kutnij <gtk3@inbox.ru>
*/
/dts-v1/;
#include "mt6582.dtsi"
/ {
model = "Prestigio PMT5008 3G";
compatible = "prestigio,pmt5008-3g", "mediatek,mt6582";
aliases {
bootargs = "console=ttyS0,921600n8 earlyprintk";
serial0 = &uart0;
serial3 = &uart3;
};
chosen {
stdout-path = "serial0:921600n8";
};
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};
Annotation
- Immediate include surface: `mt6582.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.