arch/arm/boot/dts/microchip/at91-cosino_mega2560.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/microchip/at91-cosino_mega2560.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/microchip/at91-cosino_mega2560.dts- Extension
.dts- Size
- 1243 bytes
- Lines
- 76
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
at91-cosino.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* at91-cosino_mega2560.dts - Device Tree file for Cosino board with
* Mega 2560 extension
*
* Copyright (C) 2013 - Rodolfo Giometti <giometti@linux.it>
* HCE Engineering
*
* Derived from at91sam9g35ek.dts by:
* Copyright (C) 2012 Atmel,
* 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
*/
/dts-v1/;
#include "at91-cosino.dtsi"
/ {
model = "HCE Cosino Mega 2560";
compatible = "hce,cosino_mega2560", "atmel,at91sam9x5", "atmel,at91sam9";
};
&adc0 {
atmel,adc-ts-wires = <4>;
atmel,adc-ts-pressure-threshold = <10000>;
status = "okay";
};
&macb0 {
phy-mode = "rmii";
status = "okay";
};
&mmc1 {
pinctrl-0 = <
&pinctrl_mmc1_slot0_clk_cmd_dat0
&pinctrl_mmc1_slot0_dat1_3>;
pinctrl-names = "default";
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
non-removable;
};
};
&rtc {
status = "okay";
};
&usart1 {
status = "okay";
};
&usart2 {
status = "okay";
};
&usb0 {
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
&pioD 19 GPIO_ACTIVE_LOW
&pioD 20 GPIO_ACTIVE_LOW
>;
status = "okay";
};
&usb1 {
status = "okay";
};
Annotation
- Immediate include surface: `at91-cosino.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.