arch/arm/boot/dts/microchip/at91-natte.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/microchip/at91-natte.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/microchip/at91-natte.dtsi- Extension
.dtsi- Size
- 3923 bytes
- Lines
- 245
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* at91-natte.dts - Device Tree include file for the Natte board
*
* Copyright (C) 2017 Axentia Technologies AB
*
* Author: Peter Rosin <peda@axentia.se>
*/
/ {
mux: mux-controller {
compatible = "gpio-mux";
#mux-control-cells = <0>;
mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
<&ioexp 1 GPIO_ACTIVE_HIGH>,
<&ioexp 2 GPIO_ACTIVE_HIGH>;
};
batntc-mux {
compatible = "io-channel-mux";
io-channels = <&adc 5>;
io-channel-names = "parent";
mux-controls = <&mux>;
channels =
"batntc0", "batntc1", "batntc2", "batntc3",
"batntc4", "batntc5", "batntc6", "batntc7";
};
batv-mux {
compatible = "io-channel-mux";
io-channels = <&adc 6>;
io-channel-names = "parent";
mux-controls = <&mux>;
channels =
"batv0", "batv1", "batv2", "batv3",
"batv4", "batv5", "batv6", "batv7";
};
iout-mux {
compatible = "io-channel-mux";
io-channels = <&adc 7>;
io-channel-names = "parent";
mux-controls = <&mux>;
channels =
"iout0", "iout1", "iout2", "iout3",
"iout4", "iout5", "iout6", "iout7";
};
i2c-mux {
compatible = "i2c-mux";
mux-locked;
i2c-parent = <&i2c0>;
mux-controls = <&mux>;
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
charger@9 {
compatible = "ti,bq24735";
reg = <0x9>;
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.