arch/arm/boot/dts/microchip/at91-nattis-2-natte-2.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/microchip/at91-nattis-2-natte-2.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/microchip/at91-nattis-2-natte-2.dts- Extension
.dts- Size
- 5877 bytes
- Lines
- 307
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
at91-linea.dtsiat91-natte.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* at91-nattis-2-natte-2.dts - Device Tree file for the Linea/Nattis board
*
* Copyright (C) 2017 Axentia Technologies AB
*
* Author: Peter Rosin <peda@axentia.se>
*/
/dts-v1/;
#include "at91-linea.dtsi"
#include "at91-natte.dtsi"
/ {
model = "Axentia Linea-Nattis v2 Natte v2";
compatible = "axentia,nattis-2", "axentia,natte-2", "axentia,linea",
"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
gpio-keys {
compatible = "gpio-keys";
key-wakeup {
label = "Wakeup";
linux,code = <10>;
wakeup-source;
gpios = <&pioB 27 GPIO_ACTIVE_LOW>;
};
};
panel_reg: panel-regulator {
compatible = "regulator-fixed";
regulator-name = "panel-VCC";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
bl_reg: backlight-regulator {
compatible = "regulator-fixed";
regulator-name = "panel-VDD";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
panel_bl: backlight {
compatible = "pwm-backlight";
pwms = <&hlcdc_pwm 0 100000 0>;
brightness-levels = < 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100>;
default-brightness-level = <40>;
power-supply = <&bl_reg>;
enable-gpios = <&pioA 20 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_blon>;
};
panel: panel {
compatible = "sharp,lq150x1lg11", "panel-lvds";
backlight = <&panel_bl>;
power-supply = <&panel_reg>;
Annotation
- Immediate include surface: `at91-linea.dtsi`, `at91-natte.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.