arch/arm/boot/dts/microchip/at91-tse850-3.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/microchip/at91-tse850-3.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/microchip/at91-tse850-3.dts- Extension
.dts- Size
- 6786 bytes
- Lines
- 363
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/pwm/pwm.hat91-linea.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
*
* Copyright (C) 2017 Axentia Technologies AB
*
* Author: Peter Rosin <peda@axentia.se>
*/
/dts-v1/;
#include <dt-bindings/pwm/pwm.h>
#include "at91-linea.dtsi"
/ {
model = "Axentia TSE-850 3.0";
compatible = "axentia,tse850v3", "axentia,linea",
"atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
sck: oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16000000>;
clock-output-names = "sck";
};
reg_3v3: regulator {
compatible = "regulator-fixed";
regulator-name = "3v3-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
ana: reg-ana {
compatible = "pwm-regulator";
regulator-name = "ANA";
pwms = <&pwm0 2 1000 PWM_POLARITY_INVERTED>;
pwm-dutycycle-unit = <1000>;
pwm-dutycycle-range = <100 1000>;
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <20000000>;
regulator-ramp-delay = <1000>;
};
sound {
compatible = "axentia,tse850-pcm5142";
axentia,cpu-dai = <&ssc0>;
axentia,audio-codec = <&pcm5142>;
axentia,add-gpios = <&pioA 8 GPIO_ACTIVE_LOW>;
axentia,loop1-gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
axentia,loop2-gpios = <&pioA 11 GPIO_ACTIVE_LOW>;
axentia,ana-supply = <&ana>;
};
dac: dpot-dac {
compatible = "dpot-dac";
vref-supply = <®_3v3>;
io-channels = <&dpot 0>;
io-channel-names = "dpot";
#io-channel-cells = <1>;
};
env_det: envelope-detector {
compatible = "axentia,tse850-envelope-detector";
Annotation
- Immediate include surface: `dt-bindings/pwm/pwm.h`, `at91-linea.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.