arch/arm/boot/dts/microchip/at91sam9261.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/microchip/at91sam9261.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/microchip/at91sam9261.dtsi
Extension
.dtsi
Size
18272 bytes
Lines
668
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC
 *
 *  Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com>
 */

#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/mfd/at91-usart.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "Atmel AT91SAM9261 family SoC";
	compatible = "atmel,at91sam9261";
	interrupt-parent = <&aic>;

	aliases {
		serial0 = &dbgu;
		serial1 = &usart0;
		serial2 = &usart1;
		serial3 = &usart2;
		gpio0 = &pioA;
		gpio1 = &pioB;
		gpio2 = &pioC;
		tcb0 = &tcb0;
		i2c0 = &i2c0;
		ssc0 = &ssc0;
		ssc1 = &ssc1;
		ssc2 = &ssc2;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			compatible = "arm,arm926ej-s";
			device_type = "cpu";
			reg = <0>;
		};
	};

	memory@20000000 {
		device_type = "memory";
		reg = <0x20000000 0x08000000>;
	};

	clocks {
		main_xtal: main_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};

		slow_xtal: slow_xtal {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <0>;
		};
	};

	sram: sram@300000 {
		compatible = "mmio-sram";
		reg = <0x00300000 0x28000>;
		#address-cells = <1>;
		#size-cells = <1>;

Annotation

Implementation Notes