arch/arm/boot/dts/microchip/at91sam9x25ek.dts

File Facts

System

Linux kernel

Corpus path

arch/arm/boot/dts/microchip/at91sam9x25ek.dts

Extension

.dts

Size

645 bytes

Lines

36

Domain

Architecture Layer

Bucket

arch/arm

Inferred role

Architecture Layer: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• at91sam9x25.dtsi
• at91sam9x5ek.dtsi

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * at91sam9x25ek.dts - Device Tree file for AT91SAM9X25-EK board
 *
 *  Copyright (C) 2012 Atmel,
 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>
 */
/dts-v1/;
#include "at91sam9x25.dtsi"
#include "at91sam9x5ek.dtsi"

/ {
	model = "Atmel AT91SAM9X25-EK";
	compatible = "atmel,at91sam9x25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";
};

&can1 {
	status = "okay";
};

&macb0 {
	phy-mode = "rmii";
	status = "okay";
};

&macb1 {
	phy-mode = "rmii";
	status = "okay";
};

&pwm0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pwm0_pwm0_1>;
	status = "okay";
};

Annotation

• Immediate include surface: `at91sam9x25.dtsi`, `at91sam9x5ek.dtsi`.
• Atlas domain: Architecture Layer / arch/arm.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.