arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/microchip/lan966x-pcb8290.dts- Extension
.dts- Size
- 3762 bytes
- Lines
- 197
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
lan966x.dtsidt-bindings/phy/phy-lan966x-serdes.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* lan966x-pcb8290.dts - Device Tree file for LAN966X-PCB8290 board
*
* Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
*
* Author: Horatiu Vultur <horatiu.vultur@microchip.com>
*/
/dts-v1/;
#include "lan966x.dtsi"
#include "dt-bindings/phy/phy-lan966x-serdes.h"
/ {
model = "Microchip EVB LAN9668";
compatible = "microchip,lan9668-pcb8290", "microchip,lan9668", "microchip,lan966";
gpio-restart {
compatible = "gpio-restart";
gpios = <&gpio 56 GPIO_ACTIVE_LOW>;
priority = <200>;
};
};
&aes {
status = "disabled"; /* Reserved by secure OS */
};
&gpio {
miim_a_pins: mdio-pins {
/* MDC, MDIO */
pins = "GPIO_28", "GPIO_29";
function = "miim_a";
};
pps_out_pins: pps-out-pins {
/* 1pps output */
pins = "GPIO_38";
function = "ptpsync_3";
};
ptp_ext_pins: ptp-ext-pins {
/* 1pps input */
pins = "GPIO_35";
function = "ptpsync_0";
};
udc_pins: ucd-pins {
/* VBUS_DET B */
pins = "GPIO_8";
function = "usb_slave_b";
};
};
&mdio0 {
pinctrl-0 = <&miim_a_pins>;
pinctrl-names = "default";
reset-gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
status = "okay";
ext_phy0: ethernet-phy@7 {
reg = <7>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
coma-mode-gpios = <&gpio 60 GPIO_OPEN_DRAIN>;
};
ext_phy1: ethernet-phy@8 {
reg = <8>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio>;
Annotation
- Immediate include surface: `lan966x.dtsi`, `dt-bindings/phy/phy-lan966x-serdes.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.