arch/arm/boot/dts/microchip/sama5d3.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/microchip/sama5d3.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/microchip/sama5d3.dtsi- Extension
.dtsi- Size
- 36755 bytes
- Lines
- 1129
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/dma/at91.hdt-bindings/pinctrl/at91.hdt-bindings/interrupt-controller/irq.hdt-bindings/gpio/gpio.hdt-bindings/clock/at91.hdt-bindings/mfd/at91-usart.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* sama5d3.dtsi - Device Tree Include file for SAMA5D3 family SoC
* applies to SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36 SoC
*
* Copyright (C) 2013 Atmel,
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
*/
#include <dt-bindings/dma/at91.h>
#include <dt-bindings/pinctrl/at91.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/at91.h>
#include <dt-bindings/mfd/at91-usart.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
model = "Atmel SAMA5D3 family SoC";
compatible = "atmel,sama5d3", "atmel,sama5";
interrupt-parent = <&aic>;
aliases {
serial0 = &dbgu;
serial1 = &usart0;
serial2 = &usart1;
serial3 = &usart2;
serial4 = &usart3;
serial5 = &uart0;
gpio0 = &pioA;
gpio1 = &pioB;
gpio2 = &pioC;
gpio3 = &pioD;
gpio4 = &pioE;
tcb0 = &tcb0;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
ssc0 = &ssc0;
ssc1 = &ssc1;
pwm0 = &pwm0;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a5";
reg = <0x0>;
d-cache-size = <0x8000>; // L1, 32 KB
i-cache-size = <0x8000>; // L1, 32 KB
};
};
pmu {
compatible = "arm,cortex-a5-pmu";
interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;
};
memory@20000000 {
device_type = "memory";
reg = <0x20000000 0x8000000>;
};
clocks {
slow_xtal: slow_xtal {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
Annotation
- Immediate include surface: `dt-bindings/dma/at91.h`, `dt-bindings/pinctrl/at91.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/gpio/gpio.h`, `dt-bindings/clock/at91.h`, `dt-bindings/mfd/at91-usart.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.