arch/arm/boot/dts/microchip/sama5d3xmb.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/microchip/sama5d3xmb.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/microchip/sama5d3xmb.dtsi- Extension
.dtsi- Size
- 4907 bytes
- Lines
- 209
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
sama5d3xcm.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board
*
* Copyright (C) 2013 Atmel,
* 2013 Ludovic Desroches <ludovic.desroches@atmel.com>
*/
#include "sama5d3xcm.dtsi"
/ {
compatible = "atmel,sama5d3xmb", "atmel,sama5d3xcm", "atmel,sama5d3", "atmel,sama5";
ahb {
apb {
mmc0: mmc@f0000000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>;
};
};
spi0: spi@f0004000 {
dmas = <0>, <0>; /* Do not use DMA for spi0 */
flash@0 {
compatible = "atmel,at25df321a";
spi-max-frequency = <50000000>;
reg = <0>;
};
};
ssc0: ssc@f0008000 {
atmel,clk-from-rk-pin;
};
/*
* i2c0 conflicts with ISI:
* disable it to allow the use of ISI
* can not enable audio when i2c0 disabled
*/
i2c0: i2c@f0014000 {
wm8904: wm8904@1a {
compatible = "wlf,wm8904";
reg = <0x1a>;
clocks = <&pmc PMC_TYPE_SYSTEM 8>;
clock-names = "mclk";
};
};
i2c1: i2c@f0018000 {
ov2640: camera@30 {
compatible = "ovti,ov2640";
reg = <0x30>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck1_as_isi_mck &pinctrl_sensor_power &pinctrl_sensor_reset>;
resetb-gpios = <&pioE 24 GPIO_ACTIVE_LOW>;
pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>;
/* use pck1 for the master clock of ov2640 */
clocks = <&pmc PMC_TYPE_SYSTEM 9>;
clock-names = "xvclk";
assigned-clocks = <&pmc PMC_TYPE_SYSTEM 9>;
assigned-clock-rates = <25000000>;
port {
ov2640_0: endpoint {
remote-endpoint = <&isi_0>;
Annotation
- Immediate include surface: `sama5d3xcm.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.