arch/arm/boot/dts/nvidia/tegra114.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nvidia/tegra114.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nvidia/tegra114.dtsi- Extension
.dtsi- Size
- 37004 bytes
- Lines
- 1346
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/tegra114-car.hdt-bindings/gpio/tegra-gpio.hdt-bindings/memory/tegra114-mc.hdt-bindings/pinctrl/pinctrl-tegra.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/reset/nvidia,tegra114-car.hdt-bindings/soc/tegra-pmc.hdt-bindings/thermal/tegra114-soctherm.htegra114-peripherals-opp.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/tegra114-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/memory/tegra114-mc.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/nvidia,tegra114-car.h>
#include <dt-bindings/soc/tegra-pmc.h>
#include <dt-bindings/thermal/tegra114-soctherm.h>
#include "tegra114-peripherals-opp.dtsi"
/ {
compatible = "nvidia,tegra114";
interrupt-parent = <&lic>;
#address-cells = <1>;
#size-cells = <1>;
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x0>;
};
sram@40000000 {
compatible = "mmio-sram";
reg = <0x40000000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x40000000 0x40000>;
vde_pool: sram@400 {
reg = <0x400 0x3fc00>;
pool;
};
};
host1x@50000000 {
compatible = "nvidia,tegra114-host1x";
reg = <0x50000000 0x00028000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA114_CLK_HOST1X>;
clock-names = "host1x";
resets = <&tegra_car 28>, <&mc TEGRA114_MC_RESET_HC>;
reset-names = "host1x", "mc";
iommus = <&mc TEGRA_SWGROUP_HC>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x54000000 0x54000000 0x01000000>;
vi@54080000 {
compatible = "nvidia,tegra114-vi";
reg = <0x54080000 0x00040000>;
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA114_CLK_VI>;
resets = <&tegra_car 20>;
reset-names = "vi";
power-domains = <&pd_venc>;
operating-points-v2 = <&vi_dvfs_opp_table>;
iommus = <&mc TEGRA_SWGROUP_VI>;
status = "disabled";
};
epp@540c0000 {
compatible = "nvidia,tegra114-epp";
Annotation
- Immediate include surface: `dt-bindings/clock/tegra114-car.h`, `dt-bindings/gpio/tegra-gpio.h`, `dt-bindings/memory/tegra114-mc.h`, `dt-bindings/pinctrl/pinctrl-tegra.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/reset/nvidia,tegra114-car.h`, `dt-bindings/soc/tegra-pmc.h`, `dt-bindings/thermal/tegra114-soctherm.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.